Table of Contents

Preface
CHAPTER 1. OVERVIEW OF MIXED-SIGNAL TESTING 1
1.1 MIXED-SIGNAL CIRCUITS 1
1.1.1 Analog, Digital, or Mixed-Signal? 1
1.1.2 Common Types of Analog and Mixed-Signal Circuits 2
1.1.3 Applications of Mixed-Signal Circuits 3
1.2 WHY TEST MIXED-SIGNAL DEVICES? 5
1.2.1 The CMOS Fabrication Process 5
1.2.2 Real-World Circuits 6
1.2.3 What Is a Test Engineer? 8
1.3 POST-SILICON PRODUCTION FLOW 9
1.3.1 Test and Packaging 9
1.3.2 Characterization versus Production Testing 10
1.4 TEST AND DIAGNOSTIC EQUIPMENT 10
1.4.1 Automated Test Equipment 10
1.4.2 Wafer Probers 12
1.4.3 Handlers 12
1.4.4 E-Beam Probers 13
1.4.5 Focused Ion Beam Equipment 13
1.4.6 Forced-Temperature Systems 13
1.5 NEW PRODUCT DEVELOPMENT 13
1.5.1 Concurrent Engineering 13
1.6 MIXED-SIGNAL TESTING CHALLENGES 15
1.6.1 Time to Market 15
1.6.2 Accuracy, Repeatability, and Correlation 15
1.6.3 Electromechanical Fixturing Challenges 15
1.6.4 Economics of Production Testing 16

CHAPTER 2. TESTER HARDWARE 19
2.1 MIXED-SIGNAL TESTER OVERVIEW 19
2.1.1 General-Purpose Testers versus Focused Bench Equipment 19
2.1.2 Generic Tester Architecture 19
2.2 DC RESOURCES 20
2.2.1 General-Purpose Multimeters 20
2.2.2 General-Purpose Voltage/Current Sources 23
2.2.3 Precision Voltage References and User Supplies 24
2.2.4 Calibration Source 24
2.2.5 Relay Matrices 24
2.2.6 Relay Control Lines 25
2.3 DIGITAL SUBSYSTEM 26
2.3.1 Digital Vectors 26
2.3.2 Digital Signals 26
2.3.3 Source Memory 27
2.3.4 Capture Memory 27
2.3.5 Pin Card Electronics 27
2.3.6 Timing and Formatting Electronics 29
2.4 AC SOURCE AND MEASUREMENT 32
2.4.1 AC Continuous Wave Source and AC Meter 32
2.4.2 Arbitrary Waveform Generators 32
2.4.3 Waveform Digitizers 33
2.4.4 Clocking and Synchronization 34
2.5 TIME MEASUREMENT SYSTEM 35
2.5.1 Time Measurements 35
2.5.2 Time Measurement Interconnects 35
2.6 RF-SUBSYSTEM 36
2.6.1 Source Path 36
2.6.2 Measurement Path 37
2.7 COMPUTING HARDWARE 37
2.7.1 User Computer 37
2.7.2 Tester Computer 38
2.7.3 Array Processors and Distributed Digital Signal Processors 38
2.7.4 Network Connectivity 39
2.8 SUMMARY 39

CHAPTER 3. DC AND PARAMETRIC MEASUREMENTS 41
3.1 CONTINUITY 41
3.1.1 Purpose of Continuity Testing 41
3.1.2 Continuity Test Technique 41
3.1.3 Serial versus Parallel Continuity Testing 44
3.2 LEAKAGE CURRENTS 46
3.2.1 Purpose of Leakage Testing 46
3.2.2 Leakage Test Technique 46
3.2.3 Serial versus Parallel Leakage Testing 46
3.3 POWER SUPPLY CURRENTS 47
3.3.1 Importance of Supply Current Tests 47
3.3.2 Test Techniques 47
3.4 DC REFERENCES AND REGULATORS 48
3.4.1 Voltage Regulators 48
3.4.2 Voltage References 50
3.4.3 Trimmable References 50
3.5 IMPEDANCE MEASUREMENTS 51
3.5.1 Input Impedance 51
3.5.2 Output Impedance 54
3.5.3 Differential Impedance Measurements 54
3.6 DC OFFSET MEASUREMENTS 55
3.6.1 VMID and Analog Ground 55
3.6.2 DC Transfer Characteristics (Gain and Offset) 56
3.6.3 Output Offset Voltage (VO,OS) 56
3.6.4 Single-Ended, Differential, and Common-Mode Offsets 58
3.6.5 Input Offset Voltage (VIN,OS) 60
3.7 DC GAIN MEASUREMENTS 60
3.7.1 Closed-Loop Gain 60
3.7.2 Open-Loop Gain 63
3.8 DC POWER SUPPLY REJECTION RATIO 66
3.8.1 DC Power Supply Sensitivity 66
3.8.2 DC Power Supply Rejection Ratio 67
3.9 DC COMMON-MODE REJECTION RATIO 68
3.9.1 CMRR of Op Amps 68
3.9.2 CMRR of Differential Gain Stages 70
3.10 COMPARATOR DC TESTS 72
3.10.1 Input Offset Voltage 72
3.10.2 Threshold Voltage 72
3.10.3 Hysteresis 73
3.11 VOLTAGE SEARCH TECHNIQUES 74
3.11.1 Binary Searches versus Step Searches 74
3.11.2 Linear Searches 75
3.12 DC TESTS FOR DIGITAL CIRCUITS 78
3.12.1 IIH/IIL 78
3.12.2 VIH/VIL 78
3.12.3 VOH/VOL 79
3.12.4 IOH/IOL 79
3.12.5 IOSH and IOSL Short Circuit Current 79
3.13 SUMMARY 79

CHAPTER 4. DATA ANALYSIS AND PROBABILITY THEORY 83
4.1 DATA VISUALIZATION TOOLS 83
4.1.1 Datalogs (Data Lists) 83
4.1.2 Lot Summaries 84
4.1.3 Wafer Maps 86
4.1.4 Shmoo Plots 87
4.1.5 Histograms 90
4.2 STATISTICAL ANALYSIS 90
4.2.1 Mean (Average) and Standard Deviation (Variance) 90
4.2.2 Probabilities and Probability Density Functions 93
4.2.3 The Standard Gaussian Cumulative Distribution Function ?(z) 96
4.2.4 Verifying Gaussian Behavior: The Kurtosis and
Normal Probability Plot 100
4.3 NON-GAUSSIAN DISTRIBUTIONS FOUND IN MIXED-SIGNAL TEST 104
4.3.1 The Uniform Probability Distribution 104
4.3.2 The Sinusoidal Probability Distribution 106
4.3.3 The Binomial Probability Distribution 109
4.4 MODELING THE STRUCTURE OF RANDOMNESS 111
4.4.1 Modeling A Gaussian Mixture Using The
Expectation-Maximization Algorithm 113
4.4.2 Probabilities Associated With A Gaussian Mixture Model 118
4.5 SUMS AND DIFFERENCES OF RANDOM VARIABLES 120
4.5.1 The Central Limit Theorem 124
4.6 SUMMARY 125

CHAPTER 5 YIELD, MEASUREMENT ACCURACY AND
TEST TIME 131
5.1 YIELD 131
5.2 MEASUREMENT TERMINOLOGY 133
5.2.1 Accuracy and Precision 133
5.2.2 Systematic Or Bias Errors 134
5.2.3 Random Errors 134
5.2.4 Resolution (Quantization Error) 134
5.2.5 Repeatability 135
5.2.6 Stability 136
5.2.7 Correlation 136
5.2.8 Reproducibility 138
5.3 A MATHEMATICAL LOOK AT REPEATABILITY, BIAS AND ACCURACY 138
5.4 CALIBRATIONS AND CHECKERS 145
5.4.1 Traceability to Standards 146
5.4.2 Hardware Calibration 146
5.4.3 Software Calibration 147
5.4.4 System Calibrations and Checkers 148
5.4.5 Focused Instrument Calibrations 149
5.4.6 Focused DIB Circuit Calibrations 153
5.5 TESTER SPECIFICATIONS 155
5.6 REDUCING MEASUREMENT ERROR WITH GREATER
MEASUREMENT TIME 157
5.6.1 Analog Filtering 157
5.6.2 Averaging 159
5.7 GUARDBANDS 160
5.8 EFFECTS OF MEASUREMENT VARIABILITY ON TEST YIELD 165
5.9 EFFECTS OF REPRODUCIBILTY AND PROCESS VARIATION
ON YIELD 167
5.10 STATISTICAL PROCESS CONTROL 171
5.10.1 Goals of SPC 171
5.10.2 Six-Sigma Quality 173
5.10.3 Process Capability, Cp, and Cpk 173
5.10.4 Gauge Repeatability and Reproducibility 175
5.11 SUMMARY 175


CHAPTER 6 DAC TESTING 181
6.1 BASICS OF DATA CONVERTERS 182
6.1.1 Principles of DAC and ADC Conversion 182
6.1.2 Data Formats 186
6.1.3 Comparison of DACs and ADCs 190
6.1.4 DAC Failure Mechanisms 191
6.2 BASIC DC TESTS 192
6.2.1 Code-Specific Parameters 192
6.2.2 Full-Scale Range 192
6.2.3 DC Gain, Gain Error, Offset, and Offset Error 192
6.2.4 LSB Step Size 195
6.2.5 DC PSS 195
6.3 TRANSFER CURVE TESTS 196
6.3.1 Absolute Error 196
6.3.2 Monotonicity 198
6.3.3 Differential Nonlinearity 198
6.3.4 Integral Nonlinearity 201
6.3.5 Partial Transfer Curves 204
6.3.6 Major Carrier Testing 204
6.3.7 Other Selected-Code Techniques 207
6.4 DYNAMIC DAC TESTS 209
6.4.1 Conversion Time (Settling Time) 209
6.4.2 Overshoot and Undershoot 210
6.4.3 Rise Time and Fall Time 210
6.4.4 DAC-to-DAC Skew 211
6.4.5 Glitch Energy (Glitch Impulse) 212
6.4.6 Clock and Data Feedthrough 212
6.5 TESTS FOR COMMON DAC APPLICATIONS 213
6.5.1 DC References 213
6.5.2 Audio Reconstruction 214
6.5.3 Data Modulation 214
6.5.4 Video Signal Generators 215
6.6 SUMMARY 215

CHAPTER 7 ADC TESTING 221
7.1 ADC TESTING VERSUS DAC TESTING 221
7.1.1 Comparison of DACs and ADCs 221
7.1.2 Statistical Behavior of ADCs 221
7.2 ADC CODE EDGE MEASUREMENTS 226
7.2.1 Edge Code Testing versus Center Code Testing 226
7.2.2 Step Search and Binary Search Methods 227
7.2.3 Servo Method 228
7.2.4 Linear Ramp Histogram Method 229
7.2.5 Conversion from Histograms to Code Edge Transfer Curves 231
7.2.6 Accuracy Limitations of Histogram Testing 232
7.2.7 Rising Ramps versus Falling Ramps 235
7.2.8 Sinusoidal Histogram Method 236
7.3 DC TESTS AND TRANSFER CURVE TESTS 244
7.3.1 DC Gain and Offset 244
7.3.2 INL and DNL 245
7.3.3 Monotonicity and Missing Codes 248
7.4 DYNAMIC ADC TESTS 249
7.4.1 Conversion Time, Recovery Time, and Sampling Frequency 249
7.4.2 Aperture Jitter 252
7.4.3 Sparkling 252
7.5 TESTS FOR COMMON ADC APPLICATIONS 253
7.5.1 DC Measurements 253
7.5.2 Audio Digitization 253
7.5.3 Data Transmission 253
7.5.4 Video Digitization 254
7.6 SUMMARY 254

CHAPTER 8 SAMPLING THEORY 259
8.1 ANALOG MEASUREMENTS USING DSP 259
8.1.1 Traditional versus DSP-Based Testing of AC Parameters 259
8.2 SAMPLING AND RECONSTRUCTION 260
8.2.1 Use of Sampling and Reconstruction in Mixed-Signal Testing 260
8.2.2 Sampling: Continuous-Time and Discrete-Time Representation 260
8.2.3 Reconstruction 264
8.2.4 The Sampling Theorem and Aliasing 269
8.2.5 Quantization Effects 271
8.2.6 Sampling Jitter 276
8.3 REPETITIVE SAMPLE SETS 283
8.3.1 Finite and Infinite Sample Sets 283
8.3.2 Coherent Signals and Noncoherent Signals 284
8.3.3 Peak-to-RMS Control in Coherent Multitones 286
8.3.4 Spectral Bin Selection 287
8.4 SYNCHRONIZATION OF SAMPLING SYSTEMS 292
8.4.1 Simultaneous Testing of Multiple Sampling Systems 292
8.4.2 ATE Clock Sources 294
8.5 SUMMARY 296

CHAPTER 9 DSP-BASED TESTING 299
9.1 ADVANTAGES OF DSP-BASED TESTING 299
9.1.1Reduced Test Time 299
9.1.2 Separation of Signal Components 299
9.1.3 Advanced Signal Manipulations 300
9.2 DIGITAL SIGNAL PROCESSING 300
9.2.1 DSP and Array Processing 300
9.2.2 Fourier Analysis of Periodic Signals 301
9.2.3 The Trigonometric Fourier Series 301
9.2.4 The Discrete-Time Fourier Series 305
9.2.5 Complete Frequency Spectrum 314
9.2.6 Time and Frequency Denormalization 318
9.2.7 Complex Form of the DTFS 319
9.3 DISCRETE-TIME TRANSFORMS 321
9.3.1 The Discrete Fourier Transform 321
9.3.2 The Fast Fourier Transform 324
9.3.3 Interpreting the FFT Output 326
9.3.4 Windowing 333
9.4 THE INVERSE FFT 345
9.4.1 Equivalence of Time- and Frequency-Domain Information 345
9.4.2 Parseval's Theorem 348
9.4.3 Frequency-Domain Filtering 349
9.4.4 Noise Weighting 350
9.5 SUMMARY 351

CHAPTER 10 ANALOG CHANNEL TESTING 359
10.1 OVERVIEW 359
10.1.1 Types Of Analog Channels 359
10.1.2 Types Of AC Parametric Tests 359
10.2 GAIN AND LEVEL TESTS 360
10.2.1 Absolute Voltage Levels 360
10.2.2 Absolute Gain and Gain Error 364
10.2.3 Gain Tracking Error 366
10.2.4 PGA Gain Tests 368
10.2.5 Frequency Response 373
10.3 PHASE TESTS 381
10.3.1 Phase Response 381
10.3.2 Group Delay and Group Delay Distortion 387
10.4 DISTORTION TESTS 389
10.4.1 Signal-to-Harmonic Distortion 389
10.4.2 Intermodulation Distortion 392
10.4.3 Adjacent Channel And Noise Power Ratio Tests 394
10.5 SIGNAL REJECTION TESTS 395
10.5.1 Common-Mode Rejection Ratio 395
10.5.2 Power Supply Rejection and Power Supply Rejection Ratio 398
10.5.3 Channel-to-Channel Crosstalk 400
10.5.4 Clock and Data Feedthrough 403
10.6 NOISE TESTS 404
10.6.1 Noise 404
10.6.2 Idle Channel Noise 405
10.6.3 Signal-to-Noise, Signal-to-Noise-and-Distortion 407
10.6.4 Spurious Free Dynamic Range 409
10.7 SUMMARY 410

CHAPTER 11 SAMPLED CHANNEL TESTING 417
11.1 OVERVIEW 417
11.1.1 What Are Sampled Channels? 417
11.1.2 Examples Of Sampled Channels 417
11.1.3 Types of Sampled Channels 420
11.2 SAMPLING CONSIDERATIONS 422
11.2.1 DUT Sampling Rate Constraints 422
11.2.2 Digital Signal Source and Capture 423
11.2.3 Simultaneous DAC and ADC Channel Testing 428
11.2.4 Mismatched Fundamental Frequencies 431
11.2.5 Reconstruction Effects in DACs, AWGs and Other Sampled-Data
Circuits 434
11.3 UNDERSAMPLING AND ALIASING 439
11.3.1 Reconstructing The High-Frequency Signal From The Aliased
Sample Set 441
11.4 ENCODING AND DECODING 446
11.4.1 Signal Creation and Analysis 446
11.4.2 Intrinsic (Quantization) Errors Associated With The DAC Operation 447
11.5 SAMPLED CHANNEL TESTS 451
11.5.1 Similarity to Analog Channel Tests 451
11.5.2 Absolute Level, Absolute Gain, Gain Error, and Gain Tracking 453
11.5.3 Frequency Response 457
11.5.4 Phase Response (Absolute Phase Shift) 460
11.5.5 Group Delay and Group Delay Distortion 460
11.5.6 Signal to Harmonic Distortion and Intermodulation Distortion 461
11.5.7 Crosstalk 462
11.5.8 CMRR 462
11.5.9 PSR and PSRR 463
11.5.10 Signal-to-Noise Ratio and ENOB 463
11.5.11 Idle Channel Noise 464
11.6 SUMMARY 465

CHAPTER 12 FUNDAMENTALS OF RF TESTING 469
12.1 INTRODUCTION TO RF TESTING 469
12.2 SCALAR VERSUS VECTOR MEASURES 471
12.2.1 Wave Definition of Electrical Signals 471
12.2.1 Measures of Electrical Waves 472
12.2.2 Power Definition 475
12.2.3 Crest Factor 478
12.2.4 Power in dBm 482
12.2.5 Power Transfer 482
12.2.6 Conjugate and Reflectionless Matching 486
12.2.7 Power Loss Metrics 487
12.3 NOISE 489
12.3.1 Amplitude Noise 490
12.3.2 Noise Figure 493
12.3.3 Phase Noise 495
12.4 S-PARAMETERS 503
12.4.1 Principles of S-Parameters Of A Two-Port Network 504
12.4.2 Scalar Representation of S-Parameters 508
12.5 MODULATION 525
12.5.1 Analog Modulation 525
12.5.2 Digital Modulation 533
12.5.3 Quadrature Amplitude Modulation 536
12.5.4 Orthogonal Frequency Division Multiplexing 536
12.6 SUMMARY 538

CHAPTER 13 RF TEST METHODS 543
13.1 SCALAR MEASUREMENT METHODS 544
13.1.1 Principles Of A Scalar Power Measurement 544
13.1.2 Gain Measurement 550
13.1.3 Scalar Power Measures Versus Time 559
13.1.4 Intermodulation Measurement 560
13.1.5 Compression Point Measurement 566
13.2 S-PARAMETER MEASUREMENTS 571
13.2.1 Principles Of A Directional Coupler 571
13.2.2 Directional Couplers On An Ate 573
13.3 NOISE FIGURE AND NOISE FACTOR 574
13.3.1 Noise Figure And Noise Factor Definition 574
13.3.2 Noise Measurement Technique With The Y-Factor Method 577
13.3.3 Noise Measurement Technique With The Cold Noise Method 579
13.3.4 Comparison Of The Noise Figure Test Methods 579
13.4 PHASE NOISE 582
13.4.1 Measuring Phase Noise Using Spectral Analysis 584
13.4.2 PLL-Based Phase Noise Test Method 588
13.4.3 Delay-Line Phase Noise Test Method 590
13.5 VECTOR SIGNAL ANALYSIS 592
13.5.1 In-Phase And Quadrature Signal Representation 593
13.5.2 Test Of Relative Phase 597
13.5.3 Error Vector Magnitude Test Method 599
13.5.4 Adjacent Channel Power Tests 601
13.5.5 Transmit Mask 604
13.5.6 Bit Error Rate 605
13.6 SUMMARY 607

CHAPTER 14 CLOCK AND SERIAL DATA COMMUNICATIONS CHANNEL
MEASUREMENTS 613
14.1 SYNCHRONOUS AND ASYNCHRONOUS COMMUNICATIONS 613
14.2 TIME-DOMAIN ATTRIBUTES OF A CLOCK SIGNAL 615
14.3 FREQUENCY-DOMAIN ATTRIBUTES OF A CLOCK SIGNAL 620
14.4 COMMUNICATING SERIALLY OVER A CHANNEL 626
14.4.1 Ideal Channel 627
14.4.2 Real Channel Effects 630
14.4.3 Impact of Decision Levels On Receiver Performance 635
14.5 BIT ERROR RATE MEASUREMENT 640
14.5.1 PRBS Test Patterns 647
14.6 METHODS TO SPEED UP BER TESTS IN PRODUCTION 651
14.6.1 Amplitude-Based Scan Test 651
14.6.2 Time-Based Scan Test 658
14.6.3 Dual-Dirac Jitter Decomposition Method 660
14.6.4 Gaussian Mixture Jitter Decomposition Method 668
14.7 DETERMINISTIC JITTER DECOMPOSITION 674
14.7.1 Period And Sinusoidal Jitter (PJ/SJ): 674
14.7.2 Data Dependent Jitter (DDJ): 677
14.7.3 Bounded and Uncorrelated Jitter (BUJ): 679
14.8 JITTER TRANSMISSION TESTS 685
14.8.1 Jitter Transfer Test 685
14.8.2 Jitter Tolerance Test 696
14.9 SUMMARY 703

CHAPTER 15 TESTER INTERFACING - DIB DESIGN 713
15.1 DIB BASICS 713
15.1.1 Purpose of a Device Interface Board 713
15.1.2 DIB Configurations 714
15.1.3 Importance of Good DIB Design 716
15.2 PRINTED CIRCUIT BOARDS 716
15.2.1 Prototype DIBs versus PCB DIBs 716
15.2.2 PCB CAD Tools 717
15.2.3 Multilayer PCBs 718
15.2.4 PCB Materials 719
15.3 DIB TRACES, SHIELDS, AND GUARDS 720
15.3.1 Trace Parasitics 720
15.3.2 Trace Resistance 720
15.3.3 Trace Inductance 721
15.3.4 Trace Capacitance 726
15.3.5 Shielding 733
15.3.6 Driven Guards 733
15.4 TRANSMISSION LINES 735
15.4.1 Various TEM Transmission Line Configurations 735
15.4.2 Transmission Line Discontinuities 737
15.4.3 Lumped- and Distributed-Element Models 738
15.4.4 Transmission Line Termination 742
15.4.5 Parasitic Lumped Elements 747
15.5 IMPEDANCE MATCHING TECHNIQUES FOR RF DIB 748
15.5.1 Introduction To The Smith Chart 749
15.5.2 Impedance Smith Chart 750
15.5.3 Admittance Smith Chart 753
15.5.4 Immitance Smith Chart 754
15.5.5 Impedance Transformation With Discrete Components On
Smith Chart 754
15.5.6 Impedance Matching With A Series And Shunt Component
Using The Immitance Smith Chart 758
15.6 GROUNDING AND POWER DISTRIBUTION 761
15.6.1 Grounding 761
15.6.2 Power Distribution 763
15.6.3 Power and Ground Planes 763
15.6.4 Ground Loops 766
15.7 DIB COMPONENTS 767
15.7.1 DUT Sockets and Contactor Assemblies 767
15.7.2 Contact Pads, Pogo Pins, and Socket Pins 768
15.7.3 Electromechanical Relays 770
15.7.4 Socket Pins 773
15.7.5 Resistors 774
15.7.6 Capacitors 775
15.7.7 Inductors and Ferrite Beads 779
15.7.8 Transformers and Power Splitters 783
15.8 COMMON DIB CIRCUITS 784
15.8.1 Analog Buffers (Voltage Followers) 784
15.8.2 Instrumentation Amplifiers 784
15.8.3 VMID Reference Adder 786
15.8.4 Current-to-Voltage and Voltage-to-Current Conversions 786
15.8.5 Power Supply Ripple Circuits 787
15.9 COMMON DIB MISTAKES 790
15.9.1 Poor Power Supply and Ground Layout 790
15.9.2 Crosstalk 790
15.9.3 Transmission Line Discontinuities 791
15.9.4 Resistive Drops in Circuit Traces 791
15.9.5 Tester Instrument Parasitics 792
15.9.6 Oscillations in Active Circuits 792
15.9.7 Poor DIB Component Placement and PCB Layout 792
15.10 SUMMARY 793

CHAPTER 16 DESIGN-FOR-TEST (DfT) 797
16.1 OVERVIEW 797
16.1.1 What Is DfT? 797
16.1.2 Built-In Self-Test 798
16.1.3 Differences between Digital DfT and Analog DfT 798
16.1.4 Why Should We Use DfT? 799
16.2 ADVANTAGES OF DfT 799
16.2.1 Lower Cost of Test 799
16.2.2 Increased Fault Coverage and Improved Process Control 801
16.2.3 Diagnostics and Characterization 801
16.2.4 System-Level Diagnostics 802
16.3 DIGITAL SCAN 802
16.3.1 Scan Basics 802
16.3.2 IEEE Std. 1149.1 Standard Test Access Port and Boundary Scan 804
16.3.3 Full Scan and Partial Scan 806
16.4 DIGITAL BIST 808
16.4.1 Pseudorandom BILBO Circuits 808
16.4.2 Memory BIST 809
16.4.3 Microcode BIST 810
16.5 DIGITAL DfT FOR MIXED-SIGNAL CIRCUITS 811
16.5.1 Partitioning 811
16.5.2 Digital Resets and Presets 812
16.5.3 Device-Driven Timing 813
16.6 MIXED-SIGNAL BOUNDARY SCAN AND BIST 814
16.6.1 Mixed-Signal Boundary Scan (IEEE Std. 1149.4) 814
16.6.2 Analog and Mixed-Signal BIST 817
16.7 AD HOC MIXED-SIGNAL DfT 819
16.7.1 Common Concepts 819
16.7.2 Accessibility of Analog Signals 819
16.7.3 Analog Test Buses, T-Switches, and Bypass Modes 821
16.7.4 Separation of Analog and Digital Blocks 823
16.7.5 Loopback Modes 825
16.7.6 Precharging Circuits and AC Coupling Shorts 826
16.7.7 On-Chip Sampling Circuits 827
16.7.8 PLL Testability Circuits 827
16.7.9 DAC and ADC Converters 829
16.8 RF DfT 830
16.8.1 RF Loop-back test 830
16.8.2 RF BIT and BIST 831
16.8.3 Correlation-based Test 833
16.9 SUMMARY 837

APPENDIX 843
PROBLEM ANSWERS 845
INDEX