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Operation and Modeling of the MOS Transistor

Third Edition

Yannis Tsividis and Colin McAndrew

Publication Date - October 2010

ISBN: 9780195170153

752 pages
7-1/2 x 9-1/4 inches

In Stock

Retail Price to Students: $166.45


Operation and Modeling of the MOS Transistor has become a standard in academia and industry. Extensively revised and updated, the third edition of this highly acclaimed text provides a thorough treatment of the MOS transistor--the key element of modern microelectronic chips.

New to this Edition

  • * Energy bands and the energy barrier viewpoint are integrated into the discussion in a smooth, simple manner
  • * Expanded discussion of small-dimension effects, including velocity saturation, drain-induced barrier lowering, ballistic operation, polysilicon depletion, quantum effects, gate tunneling current, and gate-induced drain leakage
  • * Expanded discussion of small-signal modeling, including gate and substrate current modeling and flicker noise
  • * New chapter on substrate nonuniformity and structural effects, discussing transversal and lateral (halo) doping nonuniformity, stress and well proximity effects, and statistical variability
  • * A completely re-written chapter on modeling for circuit simulation, covering the considerations and pitfalls in the development of models for computer-aided design
  • * Extensively updated bibliography
  • * An accompanying website includes additional details not covered in the text, as well as model computer code


  • Unified, careful treatment, starting from basic physical principles and explaining MOS transistor phenomena in a logical and systematic fashion, supplemented with extensive intuitive discussions
  • In-depth coverage of the development of many important models--ranging from the simple to the sophisticated--clearly identifying the connections between them, and encompassing many aspects of modeling, including dc, small-signal, large-signal transient, quasi-static operation, non-quasi-static operation, and noise
  • A completely re-written chapter on modeling for circuit simulation, covering the considerations and pitfalls in the development of models for computer-aided design
  • Extensively updated bibliography
  • An accompanying website includes additional details not covered in the text, as well as model computer code

About the Author(s)

Yannis Tsividis is Charles Batchelor Professor of Electrical Engineering at Columbia University. His work with MOS transistors began in 1975 as part of his Ph.D. work at the University of California, Berkeley, in the context of the design and fabrication of the first fully-integrated MOS operational amplifier. He is a Fellow of IEEE. Among his awards are the 1984 IEEE W. R. G. Baker Prize for the best IEEE publication and the 2003 IEEE International Solid-State Circuits Conference Outstanding Paper Award.

Colin McAndrew became involved with modeling semiconductor devices in 1987 and has contributed to the development of models for MOS, bipolar, and passive devices. He developed the backward-propagation-of-variation (BPV) technique for statistical modeling and has been a primary advocate of the use of Verilog-A and compilers for device modeling. He has a Ph.D. from the University of Waterloo, works at Freescale Semiconductor, and is a Fellow of the IEEE.

Previous Publication Date(s)

June 2003
December 1988

Table of Contents

    Chapter 1: Semiconductors, Junctions, and Mosfet Overview
    1.1 Introduction
    1.2 Semiconductors
    1.2.1 Intrinsic Semiconductors, Free Electrons, and Holes
    1.2.2 Extrinsic Semiconductors
    1.2.3 Equilibrium in the Absence of Electric Field
    1.2.4 Equilibrium in the Presence of Electric Field
    1.2.5 Semiconductors in Nonequilibrium; Quasi-Fermi Levels
    1.2.6 Relations between Charge Density, Electric Field, and
    Potentials; Poisson's Equation
    1.3 Conduction
    1.3.1 Transit Time
    1.3.2 Drift
    1.3.3 Diffusion
    1.3.4 Total Current
    1.4 Contact Potentials
    1.5 Thepn Junction
    1.6 Overview of the MOS Transistors
    1.6.1 Basic Structure
    1.6.2 A Qualitative Description of MOS Transistor Operation
    1.6.3 A Fluid Dynamical Analog
    1.6.4 MOS Transistor Characteristics
    1.7 Fabrication Processes and Device Features
    1.8 A Brief Overview of This Book

    Chapter 2: The Two Terminal MOS Structure
    2.1 Introduction
    2.2 The Flat-Band Voltage
    2.3 Potential Balance and Charge Balance
    2.4 Effect of Gate - Body Voltage on Surface Condition
    2.4.1 Flat -Band Condition
    2.4.2 Accumulation
    2.4.3 Depletion and Inversion
    2.4.4 General Analysis
    2.5 Accumulation and Depletion
    2.6 Inversion
    2.6.1 General Relations and Regions of Inversion
    2.6.2 Strong Inversion
    2.6.3 Weak Inversion
    2.6.4 Moderate Inversion
    2.7 Small - Signal Capacitance
    2.8 Summary of Properties of the Regions of Inversion

    Chapter 3: The Three Terminal MOS Structure
    3.1 Introduction
    3.2 Contacting the Inversion Layer
    3.3 The Body Effect
    3.4 Regions of Inversion
    3.4.1 Approximate Limits
    3.4.2 Strong Inversion
    3.4.3 Weak Inversion
    3.5 A "CB Control" Point of View
    3.5.1 Fundamentals
    3.5.2 The "pinchoff voltage"

    Chapter 4: The Four - Terminal MOS Transistor
    4.1 Introduction
    4.2 Transistor Regions of Operation
    4.3 Complete All - Region Model
    4.3.1 Current Equations
    4.4 Simplified All - Region Models
    4.4.1 Linearizing the Depletion Region Charge
    4.4.2 Body -Referenced Simplified All - Region Models
    4.4.3 Source - Referenced Simplified All - Region Models
    4.4.4 Charge Formulation of Simplified All-Region models
    4.5 Models Based on Quasi - Fermi Potentials
    4.6 Regions of Inversion in Terms of Terminal Voltages
    4.7 Strong Inversion
    4.7.1 Complete Strong -Inversion Model
    4.7.2 Body - Referenced Simplified Strong Inversion Model
    4.7.3 Source - Referenced Simplified Strong - Inversion Model
    4.7.4 Model Origin Summary
    4.8 Weak Inversion
    4.8.1 Special Conditions in Weak Inversion
    4.9 Moderate Inversion and Single - Piece Models
    4.10 Source - Referenced vs. Body - Referenced Modeling
    4.11 Effective Mobility
    4.12 Effect of Extrinsic Source and Drain Series Resistances
    4.13 Temperature Effects
    4.14 Breakdown
    4.15 The p-Channel MOS Transistor
    4.16 Enhancement - Mode and Depletion - Mode Transistors
    4.17 Model Parameter Values, Model Accuracy, and Model Comparison

    Chapter 5: Small Dimension Effects
    5.1 Introduction
    5.2 Carrier Velocity Saturation
    5.3 Channel Length Modulation
    5.4 Charge Sharing
    5.4.1 Introduction
    5.4.2 Short - Channel Devices
    5.4.3 Narrow - Channel Devices
    5.4.4 Limitations of Charge Sharing Models
    5.5 Drain - Induced Barrier Lowering
    5.6 Punchthrough
    5.7 Combining Several Small - Dimension Effects Into One Model - A Strong Inversion Example
    5.8 Hot Carrier Effects; Impact Ionization
    5.9 Velocity Overshoot and Ballistic Opeation
    5.10 Polysilicon Depletion
    5.11 Quantum Mechanical Effects
    5.12 DC Gate Current
    5.13 Junction Leakage; Band - to - Band Tunneling; GIDL
    5.14 Leakage Currents - Examples
    5.15 The Quest for Ever - Smaller Devices
    5.15.1 Introduction
    5.15.2 Classical Scaling
    5.15.3 Modern Scaling

    Chapter 6: The MOS Transistor In Dynamic Operation - Large Signal Modeling
    6.1 Introduction
    6.2 Quasi - Static Operation
    6.3 Terminal Currents in Quasi - Static Operation
    6.4 Evaluation of Intrinsic Chargers in Quasi - Static Operation
    6.4.1 Introduction
    6.4.2 Strong Inversion
    6.4.3 Moderate Inversion
    6.4.4 Weak Inversion
    6.4.5 All - Region Model
    6.4.6 Depletion and Accumulation
    6.4.7 Plots of Chargers versus VGS
    6.4.8 Use of Intrinsic Chargers in Evaluation the Terminal Currents
    6.5 Transit Time Under DC Conditions
    6.6 Limitations of the Quasi - Static Model
    6.7 Non - Quasi - Static Modeling
    6.7.1 Introduction
    6.7.2 The Continuity Equation
    6.7.3 Non - Quasi - Static Analysis
    6.8 Extrinsic Parasitics
    6.8.1 Extrinsic Capacitances
    6.8.2 Extrinsic Resistance
    6.8.3 Temperature Dependence
    6.8.4 Simplified Models

    Chapter 7: Small - Signal Modeling for Low and Medium Frequencies
    7.1 Introduction
    7.2 A Low - Frequency Small - Signal Model for the Intrinsic Part
    7.2.1 Introduction
    7.2.2 Small - Signal Model for the Drain - Source Current
    7.2.3 Small - Signal Model for the Gate and Body Current
    7.2.4 Complete Low - Frequency Small - Signal Model for the Intrinsic Part
    7.2.5 Strong Inversion
    7.2.6 Weak Inversion
    7.2.7 Moderate Inversion
    7.2.8 All - Region Models
    7.3 A Medium - Frequency Small - Signal Model for the Intrinsic Part
    7.3.1 Introduction
    7.3.2 Intrinsic Capacitances
    7.4 Including the Extrinsic Part
    7.5 Noise
    7.5.1 Introduction
    7.5.2 White Noise
    7.5.3 Flicker Noise
    7.5.4 Noise in Extrinsic Resistances
    7.5.5. Including Noise in Small - Signal Circuits
    7.6 All - Region Models

    Chapter 8: High Frequency Small - Signals Models
    8.1 Introduction
    8.2 A Complete Quasi - Static Model
    8.2.1 Complete Description of Intrinsic Capacitance Effects
    8.2.2 Small - Signal Equivalent Circuit Topologies
    8.2.3 Evaluation of Capacitances
    8.2.4 Frequency Region of Validity
    8.3 y- Parameter Models
    8.4 Non - Quasi - Static Models
    8.4.1 Introduction
    8.4.2 A Non - Quasi - Static Strong - Inversion Model
    8.4.3 Other Approximation and Higher - Oder Models
    8.4.4 Model Comparison
    8.5 High - Frequency Noise
    8.6 Consideration In MOSFet Modeling for RF Applications

    Chapter 9: Substrate Nonuniformity and Structural Effects
    9.1 Introduction
    9.2 Ion Implantation and Substrate Nonuniformity
    9.3 Substrate Transverse Nonuniformity
    9.3.1 Preliminaries
    9.3.2 Threshold Voltage
    9.3.3 Drain Current
    9.3.4 Buried Channel Devices
    9.4 Substrate Lateral Nonuniformity
    9.5 Well Proximity Effect
    9.6 Stress Effects
    9.7 Statistical Variability

    Chapter 10: MOSFET Modeling for Circuit Simulation
    10.1 Introduction
    10.2 Types of Models
    10.2.1 Models for Device Analysis and Design
    10.2.2 Device Models for Circuit Simulation
    10.3 Attributes of Good Compact Models
    10.4 Model Formulation
    10.5 Model Implementation in Circuit Simulators
    10.6 Model Testing
    10.7 Parameter Extraction
    10.8 Simulation and Extraction for RF Applications
    10.9 Common MOSFET Models Available in Circuit Simulators
    10.9.1 BSIM
    10.9.2 EKV
    10.9.3 HiSIM2
    10.9.4 PSP

    A. Basic Laws of Electrostatic in One Dimension
    B. Quasi - Fermi Levels and Currents
    C. General Analysis of the Two - Terminal MOS Structure
    D. Careful Definitions for the Limits of Moderate Inversion
    E. General Analysis of the Three - Terminal MOS Structure
    F. Drain Current Formulation Using Quasi - Fermi Potentials
    G. Modeling Based on Pinchoff Voltage and Related Topics
    H. Evaluation of the Intrinsic Transient Source and Drain Current
    I. Quantities Use in the Derivation of the Non-Quasi -Static Y-Parameter Model
    K. Analysis of Buried Channel Devices
    L. MOSFET Model Benchmark Tests

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